This page is a main, parent documentation page for this feature. The tables below provide links to all related documentation on this feature.
Checklist for the Code Review Process for this feature
Action Required | Assignee - Task Owner | Link | Done ? | Done Date | Approved? | Approver | Approved Date | Notes |
---|---|---|---|---|---|---|---|---|
Phase 1 - Component Level Development and Testing | ||||||||
Design Document | Gangsheng Wang (Unlicensed) | L5_Design document for generic BGC interface | Peter Thornton, William Riley (Unlicensed) | |||||
Verification and Unit Tests | Gangsheng Wang (Unlicensed) | L5_Verification for generic BGC interface | Peter Thornton, William Riley (Unlicensed) | |||||
Performance Assessment | Gangsheng Wang (Unlicensed) | L5_Performance assessment for generic BGC interface | Peter Thornton, William Riley (Unlicensed) | |||||
Validation Tests | Gangsheng Wang (Unlicensed) | L5_Validation plan for generic BGC interface | Peter Thornton, William Riley (Unlicensed) | |||||
Issue Pull Request | Gangsheng Wang (Unlicensed) | Peter Thornton, William Riley (Unlicensed) | ||||||
PR Integrator | assigned integrator | - | integrated date | - | - | - | - | |
Phase 2 - Coupled System Integration and Testing | ||||||||
Phase 2 Process Doc | ||||||||
Feature's Coupled Performance | ||||||||
Feature's Coupled Validation | ||||||||
Final Approval to part of ACME model | - | - | - | - |